In a floating diffusion amplifier, it is desirable to minimize the capacitance on the floating diffusion in order to obtain the highest charge-to-voltage conversion gain and thus the best possible signal-to-noise ratio (SNR) performance. Typically, however, the input capacitance of a source follower transistor connected to the floating diffusion is a large fraction of the total capacitance. Since the noise level of the source follower is generally inversely proportional to the transistor size (e.g., 1/.sqroot.w), whereas the input capacitance is directly proportional to the transistor size, there is an optimum size for maximizing the SNR. For state of the art processes, the optimum floating diffusion capacitance for achieving the best SNR is about 20 fF, which corresponds to an output sensitivity of about 8 .mu.V/electron.
If the floating diffusion amplifier is optimized for maximum SNR performance, the resulting high output sensitivity limits the maximum signal capacity for linear operation to about 250 K electrons full well (about 2 volts peak-to-peak output signal). Practically, it is difficult to design for larger signal voltage swings due to limitations of the linear dynamic range which are determined by the output transfer gate potential and the floating diffusion reset potential.
Therefore, a standard floating diffusion amplifier design cannot be optimized to simultaneously provide the best SNR for low level signals as well as provide large signal handling capacity, greater than 250 K electrons, which is desirable to increase dynamic range.